There is known a wafer for a semiconductor device in which an oxide film containing impurities, e.g., a Tetra Ethyl Ortho Silicate (TEOS) film, formed by a CVD process or the like, a conductive film such as a TiN film, a bottom anti-reflection coating (BARC) film and a photoresist film are stacked in this order on a silicon base member (see, e.g., Patent Document 1). The photoresist film is formed in a predetermined pattern by photolithography, and serves as a mask layer when the BARC film and the conductive film are etched.
A recent trend toward miniaturization of semiconductor devices requires a finer circuit pattern on a wafer surface. In order to form a finer circuit pattern, it is necessary to form, in an etching target film, an opening (via hole or trench) of a small size by reducing a minimum size of a pattern in a photoresist film during a semiconductor device manufacturing process.    [Patent Document 1] Japanese Patent Laid-open Publication No. 2006-190939
Although the minimum size of the pattern in the photoresist film is restricted by a minimum size that can be developed by photolithography, the minimum size that can be mass-produced by photolithography is limited due to variation of a focal length or the like. The minimum size that can be mass-produced by photolithography is, e.g., about 80 nm. On the other hand, a processing size that satisfies the demand for miniaturization of semiconductor devices is about 30 nm.
The trend of further reduction in the size that satisfies the demand for miniaturization of semiconductor devices requires the development of a technique for forming, in an etching target film, an opening having the size that satisfies the demand for miniaturization.